Based on the analysis, RTEMS-for-SPARC which supports multiple sparc processors is designed, and DSIS, the simulator of SPARC, which supports two processors, is also implemented.

• 为了给RTEMS-for-SPARC提供一个实验验证环境,本文设计实现了一个支持双CPU的SPARC模拟器DSIS(Double processors of SIS(SPARC Instruction Simulator))。