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digital clock pulse generator 数字钟脉冲发生器
multiphase clock pulse generator 多相时钟脉冲发生器
digital clock pulse 数字钟脉冲
clock pulse generator 同步脉冲发生器
Buying Letter Opener Digital Clock. 南非求购数码钟。
Digital Clock Control - Digital Clock Control. 这是一个数字显示式时钟控件。
That is a part containing digital clock functions. 那是数字时钟的零件。
The module has10 user-programmable digital I/ O lines for interfacing to other equipment, and a pulse generator for triggering other devices. 模块有10个使用者可编程数据I/线，可与其它设备相连，一个脉冲发生器以触发其它设备。
Study of the design of programmability digital clock with ISP devices. 数字电路课程设计。
A digital clock ticks down, and behind it is a large Plexiglas window. 向下的一数字钟滴嗒声，和后它是一扇大的有机玻璃窗子。
Trigger control circuit from complex programmable logic device (CPLD), ICL7135CN, the clock pulse circuit and optocoupler inverter constituted. 触发控制电路由复杂可编程逻辑器件（CPLD）,ICL7135CN,时钟脉冲电路、反相器和光耦构成。
That the antenna is excited by the high? voltage bipolar pulse generator is described. 此天线由高压双极性脉冲发生器激励。
A high voltage nanosecond pulse generator for calibrating voltage dividers with fast time response was constructed. 研制了一台高电压毫微秒脉冲发生器,它将用于标定快响应的分压器。
If the host pulls clock low before the first high-to-low clock transition, or after the falling edge of the last clock pulse, the keyboard/mouse does not need to retransmit any data. 如果在第一个高->低时钟跳变时，（或者在最后一个时钟脉冲的下降沿之后）主机将时钟拉低，键盘/鼠标不必重新传输任何数据。
Multi function remote manual pulse generator for control of all axes, including 4th and 5th if ordered. 多功能遥控手动脉冲器控制所有轴，如需要可包括第4轴和第5轴。
At the same time there also can be used to measure pulse circuit or pulse modulator for the pulse generator. 同时还出现了可用来测量脉冲电路或用作脉冲调制器的脉冲。
The transistor pulse generator power supply is now commonly employed as a UEDM power supplier. 晶体管脉冲发生器电源共同地现在被使用如同UEDM 力量供应商。
If the host pulls clock low before the first high-to-low clock transition, or after the falling edge of the last clock pulse, the keyboard/ mouse does not need to retransmit any data. 如果在第一个高->时钟跳变时，（者在最后一个时钟脉冲的下降沿之后）机将时钟拉低，键盘/标不必重新传输任何数据。
A Research of Temporal Behaviour for a New High-Efficiency Photoconductive Switch Pulse Generator[J]. 引用该论文石顺祥;鲍吉龙;王永昌;杨德顺;詹玉书;赵伟;杨鸿儒;杨斌洲;张小秋.
If the host pulls clock low before the first high-to-low clock transition, or after the falling edge of the a last clock pulse, the keyboard/mouse does not need to retransmit any data. 如果在第一个高->低时钟跳变时，（或者在最后一个时钟脉冲的下降沿之后）主机将时钟拉低，键盘/鼠标不必重新传输任何数据。