It details the IC design process and VLSI circuits, including gate arrays, programmable logic devices and arrays, parasitic capacitance, and transmission line delays.

  • 它详细规定了集成电路设计过程和超大规模集成电路电路,包括门阵列,可编程逻辑器件和阵列,寄生电容,及输电线路的延误。
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