Presents a layout strategy based on partitioning, that can efficiently solve the problem of automatic generation of logic schematics f or VLSI.A detailed partition model is discussed.

• 提出基于划分的逻辑图布图策略，有效解决超大规模集成电路(VLSI)逻辑原理图自动生成中规模与速度的矛盾，给出详细的划分模型。