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- Model Checking of UML State Machines UML状态机的模型检验方法
- real-time UML State machine 实时UML状态机
- An Operational Semantics for UML State Machines in Model Checking Context 面向模型检验的UML状态机语义
- UML state machine UML状态机
- UML 2.0 Replaced the state machine underpinning with a much more general semantic base that eliminated all of these restrictions. UML 2.;0中用一个消除了这些限制的更泛化的语义基础替代了状态机的底层。
- What Exactly Is a Finite State Machine? 有限状态机定义?
- The state machine is stacked against the people. 国家机器与人民对立。
- A business state machine can be implemented by a BPEL process. 业务状态机可以透过BPEL流程来实现。
- Therefore, the introduction of the finite state machine concepts. 为此，引入有限状态机的概念。
- A finite state machine can only be in one state at any moment in time. 有限状态机在任一时刻都只能够处于一种状态中。
- At the heart of every state machine lies an implementation of double dispatch. 在每个状态机的核心都有一个双重分派的实现。
- The basic idea of software testing on UML state chart is using the shortest test cases to cover as many states and transforms as possible. 基于UML状态图测试方法的基本思想是用尽可能短的测试用例来覆盖尽可能多的测试路径。
- Neither approach - processes or state machines - is superior. 两种方法过程或者状态机中没有哪个是更好的。
- Some finite state machines fall into this category, for example. 例如,一些有限状态机属于这一类别。
- Demonstrates how to create a state machine workflow that implements a speech-driven menu application. 演示如何创建用于实现语音驱动菜单应用程序的状态机工作流。
- You can also query the state machine? S current state to determine an operation? S validity. 您也可以查询状态机的当前状态来确定操作的有效性。
- For the feature of GUI and OO, A model based finite state machine(FSM) for conformance testing is presented. 一、针对C/S系统的GUI和OO特性，提出了基于有限状态机(FSM)的一致性测试模型。
- The ASM( algorithm state machine) chart is the flow chart used for the description of digital systems . ASM图是算法状态机的简称,是一种用来描述数字系统算法的流程图。
- High-level design intents such as finite state machine (FSM) and counter are commonly used in modern VLSI design. 高阶设计资讯被广泛的应用在现今超大型积体电路的设计上，如：有限状态机、计数器等等。
- This program is designed to take a regular expression and produce a graph of the state machine that is used to parse the regular expression. 这个程序旨在接收一个正则表达式并产生一个状态机的时序图，状态机用来分析正则表达式。
