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It is possible to reduce hardware cost by testing smaller-sized. 采用较小尺寸的试验发动机可以减少零件的费用。
The associativity depends on the hit time and the hardware cost. 联结度的选择，乃根据冲突错失及硬体价目的大小而定。
Before they're done,the initial hardware cost will be $1,000 or more. 要做到这些，硬件的起始价将为1000美元，甚至更高。
Before they're done, the initial hardware cost will be $1,000 or more. 要做到这些，硬件的起始价将为1000美元，甚至更高。
A last-minute cancellation on a rush order for military hardware cost us a staggering $1200. 有一张军用器械的紧张定单在最后一分钟取消了，使我们损失了1200美元。
Actual application shows that temperature control accuracy is higher and hardware cost is lower,and the whole sys... 实际运行结果表明,整个系统温度控制精度高,硬件成本低,很好地满足了工艺上的要求。
In this paper, a novel fast SATD method is proposed to reduce both the (computation complexity) and the hardware cost of SATD. 在这篇文章中我们将提出的一个能同时减少SATD运算复杂度并降低硬体成本的运算方法。
The XD series is one opposite and lower hardware cost, passing complicated technique measure, carrying out many PuLe's to measure soon function. XD系列是一相对较低的硬件成本，通过复杂的技术措施，实现了多普勒测速功能。
In comparison with the hardware-only EDAC method, the proposed method can correct more bit-flip errors without increasing hardware cost. 相对于纯硬件的EDAC方法而言，该方法能纠正更多的内存位翻转错误，并且无需增加硬件资源开销。
Due to using a special shift counter to simplify the control circuit, the decompression circuit can be implemented easily and the hardware cost is low. 解压时使用一种特殊的计数器简化控制电路，解码电路硬件开销小且较易实现。
Keeping the features of the VPWM without extra hardware cost,this method decreases the common-mode voltage of the induction motor drive using the VSI. 详细分析了一种新颖的空间矢量脉宽调制控制方法,无需增加任何硬件,可以非常有效地减小电压源逆变器供电的异步电机驱动系统的共模电压。
The design of embedded hardware platform is based on hardware modularization and flexi-ble configuration technologies,which reduces hardware cost and shortens development period. 嵌入式硬件平台的设计以硬件模块化设计和灵活组态技术为基础以减少硬件成本和缩短开周期。
The experimental results show that for the circuits having many inputs,the length of test vectors generated by this method is much shorter and the hardware cost is smaller. 测试生成后，再将一维的测试向量转换成瞬态电流测试需要的测试向量对施加到被测电路。实验表明，对于输入端较多的电路，该方法生成的测试向量序列长度极大的减少，硬件开销也较小。
Though the smart card can be used conveniently, the hardware cost is high, especially if the life of private key is short, managing them is very difficult. 虽然智能卡使用方便，但硬件成本太高，而且特别的如果遇到密钥生存周期较短的密钥管理时，其不便性就显示出来了。
And the hardware cost is efficiently decreased by optimizing shift logic of the transposer, reusing pipeline register set and optimizing the implementation of rounding operation. 此外,通过优化转置单元的移位逻辑,复用流水寄存器组以及优化四舍五入运算的实现,有效地减小了硬件开销。
This method will save hardware cost significantly,and the performance of the difference pattern is superior to that which obtained only by optimizing the sub-array weights. 这种方法在大大的节省了硬件成本的同时,其获得的差方向图的性能明显优于只优化子阵加权获得的差方向图。
By using a software-as-a-service model for delivering EHR systems, those practices can reduce upfront hardware costs. 通过使用软件作为一项服务模式提供电子病历系统，这些做法可以减少前期硬件成本。
The combination is increasing the relative importance of storage to total system hardware costs. 这种组合增加了存储器对总的系统硬件费用的相对重要性。
Distributed computing ought to reduce hardware costs,and it can if a distributed design fits your application load better than the alternatives. 分布式计算是应该降低硬件成本的，如果分布式设计比其它的方法更适合应用程序的负载, 那么是能降低成本的。
On the circuit level optimization, two logic circuit optimization methods, RaR and SRAR, are proposed. The optimization step of retiming and resynthesis can solve the problem of logic circuit redundancy efficiently and reduce the hardware cost. 在电路级的优化设计中,本文总结分析了RaR逻辑优化和SRAR逻辑优化两种优化方法,通过重定时和再综合的优化步骤,有效解决逻辑电路冗余的问题,从而减少了硬件电路的开销,并通过实例验证分析了这两种优化方法。