您要查找的是不是:
- Study and design of an on chip clock generator with high stability 一种高稳定度片内时钟发生器的研究与设计
- SoC (System on Chip) is satisfied with the demand. 片上系统SoC(System onChip),就是在这种环境下应运而生的。
- And finally, a clock generator based on the 3rd order CPPLL is fully designed with UMC 0.25 CMOS process. 最后,采用UMC 0.;25 CMOS工艺技术设计了一个用作时钟产生的三阶电荷泵锁相环。
- on chip clock oscillator 片上时钟振荡器
- This code contains the IIC operation code, and how to read and write through the IIC chip clock source. 此代码包含IIC操作代码、以及怎样通过IIC读写时钟芯片的源码。
- It's the best time to stock up on chips. 正是个疯狂抢购土豆片的大好时机。
- The Measurement of Average Power for Non-Sinusoidal Waveforms Based on Chip Microcomputer. 基于单片机的非正弦波平均功率的测量。
- Can be used in the synthesis loop vibration, high-precision clock generator and FSK / / 3PSK modulation. 可用于本振合成回路,高精度时钟发生器和FSK//3PSK调制。
- ACET devices can be readily integrated on chip into a microsystem.This offers insight into designing ACET lab-chips. 研究结果为设计交流电热效应芯片实验室提供了参考依据。
- The development condition of 55 dtex bright trilobal profiled FDY on chip spinning FDY production line is introduced. 介绍在切片纺FDY生产线上开发55dtex有光三叶异形全拉伸丝。
- In chapter two, a three nonoverlapping phases clock generator is presented at first and the experimental results are given finally. 在第二章中,一各三相非重叠电路将会被提出,而其实验结果将会被论述在本章之末。
- The influences of some cutting parameters on chip curvature and mechanism of chip-curling are also studied. 本文还研究了一些切削参数对切屑卷曲影响规律及切屑卷曲过程的机理。
- The dissertation describes the principle of spread spectrum clock generator and its implement structure.Especially analyzes PLL and the loop divider. 本文先介绍了扩谱时钟发生器(SSCG)的基本原理以及扩谱时钟的不同实现电路结构,并对扩谱时钟发生器中的锁相环(PLL)以及环路分频器进行了分析。
- In this paper ,the SoC on chip bus is analyzed bycomparison of AMBA, AVALON, OCP and WISHBONE . 本文通过对AMBA, AVALON, OCP,WISHBONE等SoC总线的比较,分析了SoC片上总线技术。
- Hardware and software co design technique is the critical technique in system on chip design. 硬件 /软件协同设计技术 (HW/SW Co-Design)是实现“片上系统”(So C)设计的重要环节。
- The whole AFE circuit includes a bias circuit, a clock generator, a chopper stabilization amplifier, a post-amplifier, and a second-order continues-time low-pass filter. 本文所提整体类比前端电路包含偏压电路、时脉产生器、截波稳定型放大器、后置放大器、和二阶连续时间低通滤波器。
- A high performance SDRAM controller orienting to system on chip is designed by analyzing the access of SDRAM. 摘要在分析了SDRAM存取原理之后,提出并设计了一种面向片上系统的高性能SDRAM控制器。
- First, in order to analyze the PLL clock generator, we have established the loop parameters.The parameters effect on the PLL transient characteristic has been studied. 首先,为了分析锁相迴路时脉产生器,我们建立了迴路的参数并探讨这些参数对锁相迴路暂态响应的影响。
- Shashi Kumar,Axel Jantsch,et al.A Network on Chip Architecture and Design Methodology. IEEE 2002. 陈国良,吴俊敏,章锋,章隆兵编著.;并行计算机体系结构
- The ADM system mainly includes a oscillator, a clock generator, an amplifier, a pre-amplif ier, a comparator, an AGC(Automatic Gain Control), an ADM analyzer &synthesizer, a D/A converter and a lowpass filter. 整个系统包括:内置振荡器,时钟产生器,放大器,前置运算放大器,比较器,AGC(自动增益控制器),ADM分析综合器,数模转换器以及低通滤波器。