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- One example is the phase comparator of a phase locked loop. 一个例子是相锁环状态下的相位比较器。
- Phase locked loop (PLL) has been widely used in communication system. 锁相环路在通信系统中得到了广泛的应用。
- Resolution of Systematic Design Trouble with PLD Interior Phase Lock Loop. 使用PLD内部锁相环解决系统设计难题。
- The phase jitter of output signal of the PLL( phase locked loop) frequency doubler is analyzed. 定量分析了数字式锁相倍频器输出信号的相位抖动.
- A phase locked wavelength drive prevents peak shifts and peak suppression at high scan speeds. 相位锁定波长驱动技术可以防止仪器在快速扫描时吸收峰的偏移。
- Phase locked loops (PLL) are electronic systems widely used in different fields of applications. 锁相回路（PLL）做为一种电子系统广泛的用于不同的应用领域。
- TMS320F240 DSP is used to realize the digital Phase Locked Loop(PLL) and real-ize the hot-swap function of the parallel system. 采用TMS320F240型DSP芯片实现数字锁相同步,实现并联系统的热插拔功能。
- This paper discusses a method to demodulate FSK signal, on the basis of FPGA chip, by applying all- digital phase locked loop. 本文研究了一种采用全数字锁相环实现频移键控FSK信号解调的新方案。
- The basic principle of using phase locked loop technique to realize the design and analysis of program controlled frequency syntheses was introduced. 本文简要地叙述了应用锁相环路实现信号合成的基本原理。
- Both incorporation exterior VCO and loop filter could rattling realize celerity Phase Lock function. 结合外部VCO和环路滤波器可以很好的实现快速锁相功能。
- Abstract：The Phase Lock Loop (PLL) Circuits are widely used in electronic systems especially in receivers. 锁相环路是在现代各种电子系统中，特别是在接收机中应用广泛的一种基本电路。
- The coupling visibilities(CV) of temperature sensor heads were measured with phase lock loop technique. 采用锁相环技术测试了各传感器的分光可见度随温度的变化关系。
- Results show that the phase locking steps occur in the IV-curves. 结果表明，在直流伏安特性曲线上出现了相锁定台阶。
- In this paper the working princi-ple and desiging method of which phase locked loop are discussed the experimental resuIts are given also. 本文分析了无相差锁相环的原理和设计方法，并给出了实验结果。
- This paper presents a digital phase lock technique for UPS inverter output control to meet the trend of UPS digital control. 针对不间断电源(UninterruptedPowerSupply,UPS)控制的数字化趋势,提出了一种应用于数字化UPS的逆变锁相控制技术。
- The transmitter uses a phase locked loop to provide multi-phase clocks for PRBS circuit and 4-to-1 multiplexer to convert parallel data into serial one. 在传输端利用锁相迴路提供多相位时脉输出给乱数产生器和4对1多工器，并将一组并列资料转换为串列输出，再经传输器使输出的资料振幅放大，最后将资料传输至耦合的电极板上。
- Chorng-Sii Hwang and Wen-Wei Chiu, “Internal offset-canceled phase locked loop-based deskew buffer”, US Patent No.6346838, from Feb. 12th, 2002 to Jan. 5th 2021. 黄崇禧,邱文伟“以锁相迴路为基础之去偏差缓冲电路及其产生方法”,台湾专利，专利字号541800,自2003年7月11日起至2021年11月28日止。
- It is a fundamental for all synchronism to achieve phase locked.It is discussed in this paper for one type of phase locked circuit in laser typesetter with scan deflector. 而激光照排机中的锁相电路又是激光照排机电路部分的关键,成功锁相是实现照排机各项同步的基础。
