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- Shunt capacitance may increase the settling time. 分流电容可增大稳定时间。
- Settling time can best be illustrated with an example. 用一个例子可以最好地说明稳定时间。
- A low-pass programmable digital filter with adjustable filter cutoff, output rate, and settling time processes the modulator output. 低通道可编程的数字式滤波器与可调整的过滤器开关,的输出率和沉淀时间过程调制器的输出量。
- Based on this model,it analyses the stability and the settling time of the DAGC loop in z domain. 通过仿真模型的传递函数对环路模型的稳定性及稳定时间作了Z域分析。
- Many efforts have been devoted to improve the resolution and settling time for these current steering DACs. 此外采取外挂电阻的方式直接将输出讯号由电流转成电压。
- On this basis the relations among H/D, minimum settling velocity and design settling time were probed into. 在此基础上，探究了H/D、最小沉速、设计沉淀时间等因素之间的相关关系。
- Popped corns can be added to milk to increase the settling time in the stomach, which can improve the absorb rate of the nutrition. 膨脆谷物可添加在牛奶中食用，可增加牛奶在胃中的停留时间，显著提高营养的吸收率。
- The modulator output is processed by a low pass programmable digital filter, allowing adjustment of filter cutoff, output rate and settling time. 调制器输出由低通可编程数字滤波器处理，滤波器截止、输出速率和建立时间可通过编程进行调整。
- The simulation results are given to illustrate that this controller can decrease more undershoot and settling time,and the system has favorable dyna... 仿真实验结果表明,该方法不仅进一步的抑制了系统的反调,同时也缩短了过渡时间,并且具有良好的动态性能和较强的鲁棒性。
- Particularly for high resistance measurements, the system settling time should be verified as sufficient to provide the desired accuracy. 尤其是对于高阻测量，应该验证系统的稳定时间，使其足以提供所期望的准确度。
- The first notch of this digital filter can be programmed via the on-chip control register allowing adjustment of the filter cutoff and settling time. 此数字滤波器的第一个陷波可通过片内控制寄存器进行编程，以便对滤波器截止和建立时间进行调整。
- OTA bandwidth and current can be obtained through settling time formula of switched capacitor integrator to optimize power. 根据积分器的建立时间关系式确定出合适的OTA 带宽以及电流达到优化功耗设计。
- "Doomsday clock " have pendulum only and do not have any rigid structures, accordingly it cannot proper motion settling time. “末日钟”只有钟摆而无任何机械结构，因此它无法自行调整时间。
- The current should be measured after a sufficient settling time to allow the switching transients to decay and the current to stabilize. 应该等待足够的时间，使开关瞬态信号衰减，电流达到稳定，然后再进行测量。
- The time needed to reach the steady value, or the settling time, can be used to determine the proper delay time for the measurement. 达到稳定值所需的时间，或者说是稳定时间，可被用来确定合适的测量延迟时间。
- An adaptive Phase-Locked Loop (PLL) with a fast settling time and its key blocks including Phase-Frequency Detector (PFD) and charge pump are then proposed and analyzed. 提出并分析了一种自适应的具有快速建立时间的锁相环结构及其关键模块(鉴相鉴频器和电荷泵)。
- After the relay settling time, an output trigger is sent over line #1 to both of the Model 2400 SourceMeter instruments. (A “before source” trigger in the SDM cycle. 在经过延迟稳定时间后，输出触发通过%231线发送到两台2400型源表（SDM周期中的“源前”触发）。
- For the control of non-minimum phase systems, there is a need to solve the problem of tradeoffs between undershoot caused by unstable zeros and settling time. 摘要非最小相位系统的控制中，需要抑制由不稳定零点引起的负调并同时缩短系统的调节时间。
- Such a process would have a larger overshoot and longer settling time, so that the quality of the transition process variation, reducing the stability of the system. 这样的过程必然会产生较大的超调量和较长的调节时间，使过渡过程品质变差，系统的稳定性降低。
