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- Lesson1 How does a logic gate in a microchip work? 第一课芯片上的逻辑门是如何工作的?
- Literal Logic Gate, ternary invertor has been explained by this quenching concept. 主要从事化合物半导体器件及其集成电路、单片及混合光电集成电路的研究工作。
- SSI chips are usually basic logic gates and flip-flops. 小型集成电路通常是最基本的逻辑栅门。
- After study a series array multipliers algorithms and architectures, . the author design a high-performance multiplier in logic gate level, which using Booth and Wallace skill. 本文研究讨论了各种不同阵列乘法器的结构和原理,并完成了在门电路级设计了32位基4Booth编码并采用42压缩的Wallace高性能阵列乘法器电路。
- Once this occurs, even though the ions may be widely separated, the manipulation of one of the qubits will affect the other, allowing the construction of a CNOT logic gate. 一旦这事发生了，即使离子距离很远，操纵其中一个量子位元时还是会影响到另外一个，所以可以做出成功的CNOT逻辑闸。
- This voltage creates a field across the gate oxide, which causes the adjacent P substrate to invert to N-type. 这一电压在栅极氧化物层上产生一个电场，它导致毗邻的P型衬底转变成N型。
- In chapter two, A new scheme to realize quantum logic gates, including CNOT gate and swap gates, and quantum teleportation are described by making use of Josephson junctions. 本文研究约瑟夫森结和腔场相互作用的量子动力学行为，并研究利用此类相互作用系统实现量子计算和量子信息处理的方法。
- At the sub 90nm technology node, the gate oxide thickness is expected to be 12-15 Angstrom. 当半导体结点技术发展到小于90纳米时,栅氧化层厚度将减薄至12到15埃。
- With Keithley S900 and TEL-P8 test system, it is applied in the evaluation of gate oxide lifetime of 0.13um process. 本文就已有的测试项目TDDB，根据国外前沿的研究结果，提出了一些新的测试方案，并在C语言的环境下实现算法，结合Keithley S900和TEL-P8测试系统，用于测试0.;13um工艺的栅氧化层寿命。
- In this thesis, we are going to discuss the characteristics of DPN nitrided gate oxide. 因此本论文将讨论去耦电浆氮化闸极氧化层之元件特性。
- A magnetic processor constitutes an array of logic gates, each of them programmable individually by the software. 磁处理器由逻辑闸阵列所组成，其中每个闸都可以由软体独立编程。
- Quantum Logic Gate and Its Evolving 量子逻辑门及其研究进展
- To obtain high performance and low power device, gate oxide thickness shrinkage is a main stream in modern ULSI industry. 摘要:为了达到高性能和低电压之元件，减少闸极氧化层厚度是现代超大型积体电路工业的一个主流。
- The popular oscillator design which uses a resistor, one or more logic gates, a quartz crystal, and a couple of capacitors should never be used! 一般振荡器设计都用一个电阻、一个或几个逻辑门、一个晶体、两个电容，在这里绝对不能用。
- Abstract： The surfaces of poly-Si thin film and gate oxide of thin film transistors were passivated using N2O/NH3 plasma. 摘 要： 采用N2O和NH3等离子钝化技术对多晶硅薄膜表面和栅氧表面进行了钝化处理。
- Furthermore, N ion-implantation that is used in ultra-thin gate oxide parts and in restraining the diffusion of doped impurity is also described. 介绍了氮离子注入在制备超薄氧化栅极及其抑制掺杂杂质原子特别是硼原子扩散等方面的研究和应用。
- Because of the programmability of the logic gates, hardware no longer determines processor capabilities. 由于逻辑闸可编程，所以处理器的功能不再由硬体所决定。
- Can scientists come up with suitable interactions to implement quantum logic gates reliably? 科学家能不能想出合适的交互作用，让逻辑闸可靠地运作？
- The problem is that the gate oxide, which in modern chips is just several atoms thick, is becoming too slim to lay down reliably. 问题是，现代晶片中的闸极氧化层厚度只有几个原子，已经薄到不容易确实放置在晶圆上的地步。
- The most important defect in large size ingots is void, which can degrade the gate oxide integrity (GOI), so as to affect the yields and stability of devices and 1C. 大直径硅单晶、硅片中的最重要的缺陷之一是VOID，它会严重影响硅器件、集成电路的生产成品率和性能稳定性。
