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- Primitive code is based on Verilog HDL FPGA original program, mainly for the measurement frequency, the main features can be faster frequency measurement. Real-time higher. 语言的FPGA原程序,主要用于测频率,特点主要是可以更快地测频。实时性更高。
- HDL FPGA 可编程门阵列
- The RTL level of this design is implemented in Verilog HDL,and verified in FPGA. 该设计采用Verilog进行RTL级实现,并在FPGA系统中得到验证。
- The core can be instantiated in the HDL capture of the FPGA design between the native waveform logic and the system bus. 核心可以用HDL来具化,HDL实现了本地波形逻辑和系统总线之间的FPGA设计。
- HDL levels in male patients low(P<0.05). 治疗后男性的HDL水平明显降低 (P <0 0 5 ) ;
- EDAC,TMR and CFC were implemented in VHDL on FPGA. 用VHDL描述并在FPGA上实现EDAC、TMR和CFC.
- Tested on Sparton 3 xilinx FPGA. 测试斯帕顿3赛灵思FPGA 。
- EDAC, TMR and CFC were implemented in VHDL on FPGA. 用VHDL描述并在FPGA上实现EDAC、TMR和CFC。
- The CLB is the basic logic unit in an FPGA. CLB是FPGA内的基本逻辑单元。
- Editing of HDL Display name, boot file &compatability modes. 编辑hdl中每个游戏显示的名字,启动文件和启动模式。
- Verilog HDL design and applications of digital system II. 数字系统设计及其应用2。
- A New Decode Method of BCH Code and FPGA Implementation. 一种BCH码的新型译码方法及其FPGA器件实现。
- Flash based FPGA, ASIC, SRAM-based FPGA, which one do you choose? 你选择谁?简介
- Use the FPGA technique to abstract and filter PID is TS stream. 介绍了对TS流的PID进行提取和过滤的方法,并用FPGA予以实现。
- Using FPGA to Implement DDR Memory Controller Scien? 利用FPGA实现DDR存储器控制器
- Anti-fuse is widely used in FPGA,DRAM,PROM,EPROM chips. 反熔丝器件广泛地应用在FPGA、DRAM、PROM、EPROM芯片中.
- Handel-C is a language for FPGA design based on ISO/ANSI C. FPGA开发语言Handel-C是一种基于ISO/ANSIC的硬件描述语言。
- The ratio of total cholesterol to HDL cholesterol fell insignificantly. 总胆固醇与高密度脂蛋白胆因醇的比率下降不大。
- A method of realizing QPSK modulator based on FPGA is presented. 提出了一种基于FPGA实现QPSK调制器的方法。
- At last, the fuzzy CMAC was implemented based on a given FPGA. 最后,在特定的FPGA器件上实现了模糊CMAC网络。