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- After study a series array multipliers algorithms and architectures, . the author design a high-performance multiplier in logic gate level, which using Booth and Wallace skill. 本文研究讨论了各种不同阵列乘法器的结构和原理,并完成了在门电路级设计了32位基4Booth编码并采用42压缩的Wallace高性能阵列乘法器电路。
- logic gate level 逻辑门级
- Lesson1 How does a logic gate in a microchip work? 第一课芯片上的逻辑门是如何工作的?
- This thesis has accomplished the design of register transfer level (RTL) of every unit in the digital processing module, and passed function verification, logic synthesis, and gate level verification. 本文完成了数字处理模块各个单元的寄存器传输级(RTL)设计,并通过了功能仿真、逻辑综合与门级仿真。
- Literal Logic Gate, ternary invertor has been explained by this quenching concept. 主要从事化合物半导体器件及其集成电路、单片及混合光电集成电路的研究工作。
- The verification includes RTL simulation, gate level simulation and static timing analysis. 验证工作包括RTL级仿真、门级仿真和静态时序分析。
- SSI chips are usually basic logic gates and flip-flops. 小型集成电路通常是最基本的逻辑栅门。
- Finally and some discussions are made on the advantages and disadvantages of the Gate Level Evolvable Hardware. 在函数级进化中,首先在FPGA内部设计了用高级功能模块和互连矩阵构成函数级进化的结构,探讨了如何利用这种结构缩短染色体编码并设计了用于函数级进化的系统平台。
- Constant components and output opened ports in the result of high level synthesis lead to explicit redundancy in gate level technology mapping. 高级综合结果中常量元件和输出悬空端口导致门级工艺映射结果中存在显式冗余。
- Once this occurs, even though the ions may be widely separated, the manipulation of one of the qubits will affect the other, allowing the construction of a CNOT logic gate. 一旦这事发生了,即使离子距离很远,操纵其中一个量子位元时还是会影响到另外一个,所以可以做出成功的CNOT逻辑闸。
- In order to improve the security of the system, the breakers are operated to control the power of the sluices in the dynamoelectric method and the gate level gauge is composed of absolute Gray coder and elastic equilibrium sensor. 为了提高系统的安全性 ,采用了电动操作断路器对闸门的动力电源进行控制。 闸位计采用绝对值格雷码编码器以及弹性平衡传感器组成。
- A magnetic processor constitutes an array of logic gates, each of them programmable individually by the software. 磁处理器由逻辑闸阵列所组成,其中每个闸都可以由软体独立编程。
- In chapter two, A new scheme to realize quantum logic gates, including CNOT gate and swap gates, and quantum teleportation are described by making use of Josephson junctions. 本文研究约瑟夫森结和腔场相互作用的量子动力学行为,并研究利用此类相互作用系统实现量子计算和量子信息处理的方法。
- This flow could use the gated clock,the operand isolation and the gate level optimization to decrease the power consumption without changing the original design. 这种综合流程在不改变原有电路设计的前提下同时采用了门控时钟、操作数隔离和门级功率优化来降低功耗。
- The popular oscillator design which uses a resistor, one or more logic gates, a quartz crystal, and a couple of capacitors should never be used! 一般振荡器设计都用一个电阻、一个或几个逻辑门、一个晶体、两个电容,在这里绝对不能用。
- Because of the programmability of the logic gates, hardware no longer determines processor capabilities. 由于逻辑闸可编程,所以处理器的功能不再由硬体所决定。
- Can scientists come up with suitable interactions to implement quantum logic gates reliably? 科学家能不能想出合适的交互作用,让逻辑闸可靠地运作?
- gate level combinational circuits [计] 门级组合电路
- Quantum Logic Gate and Its Evolving 量子逻辑门及其研究进展
- Based on logic gates of complementary single-electron transistor (SET), three units are proposed as follows: full adder, shift register and ROM. 摘要基于互补型单电子晶体管(SET)逻辑门,提出了SET加法器、移位寄存器和ROM的单元电路。