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Programmable logic, in particular field programmable gate array (FPGA) is such a solution. 可编程逻辑，特别是现场可编程门阵列（FPGA）便是这样的解决方案。
This paper introduces a method to implement UARTbased on Field Programmable Gate Array(FPGA). 文章介绍了一种在现场可编程门阵列(FPGA)上实现UART的方法。
A digital hardware control scheme of shunt active power filter(SAPF)based on field programmable gate arrays (FPGA)is introduced. 提出一种基于现场可编程门阵列(FPGA)的并联型有源电力滤波器(SAPF)的控制器方案。
A new digital beam forming (DBF) method is proposed. It combines the parallel delay LMS (PDLMS) algorithm and the field programmable gate array (FPGA). 采用高并行度的并行延时最小均方 (PDLMS)算法 ,用现场可编程门阵列 (FPGA)实现自适应数字波束形成模块。
The prototype of a Line - doubler system was finally implemented in hardware using FPGA (Field Programmable Gate Array) technology. 根据这种自适应处理的思想，用FPGA（现场可编程逻辑器件）进行原形开发。
A high-resolution flight time measurement system based on a single field programmable gate array (FPGA) in laser altimeter is designed. 设计了在激光测高系统中基于单芯片现场可编程门阵列(FPGA)的高精度时间间隔测量模块。
Then the hardware implementation scheme is discussed in detail, and the method of adopting Field Programmable Gate Array (FPGA) to realize control of the module is expatiated. 接着详细论述了模块的硬件实现方案,并着重分析了采用现场可编程门阵列(FPGA)技术控制模块的实现方法;
An advanced digital controller based on Digital Signal Processor(DSP) and Field Programmable Gate Array(FPGA) is developed and applied in DCI-UPQC successfully. 同时,开发了一套适用于电力电子装置的基于数字信号处理器(Digital Signal Processor,简称DSP)和(Field Programmable GateArray,简称FPGA)的先进数字控制平台,成功地将其应用于DCI-UPQC样机。
The basic concept of Evolvable Hardware(EHW) is introduced.Function Level EHW is explained based on Genetic Algorithm(GA) and Field Programmable Gate Array(FPGA). 介绍了可进化硬件的基本思想,阐述了基于遗传算法和现场可编程门阵列的函数级进化方法及其特点。
A spatiotemporal chaotic map is digitized to develop a highly paralleled PRBS generator that accommodates to FPGA (Field Programmable Gate Array) implementation in present paper. (译)：阿时空混沌地图是数字化发展的高度并行PRBS发生器，可为FPGA的（现场可编程门阵列）执行本文件。
The objective of this research is the former-end hardware design for the 64-bit RISC(Reduced Instruction Set Cpomputer)CPU core and the implementation and verification of the design on FPGA(Field Programmable Gate Array). 本研究的目的是进行64位的精简指令集中央处理器的前端硬件设计，并将此设计在FGPA上实现以通过实际的电路验证。
The fast development of modern VLSI technology has provided the base of hardware for the video image processing technology, in which it is specially good that Field Programmable Gate Array are used in embedded video image processing operations. 现代大规模集成电路VLSI技术的迅猛发展为视频图像处理技术提供了硬件基础。其中,现场可编程门阵列FPGA用于嵌入式视频图像处理有其独特优势。
The field programmable gate array(FPGA) simulation shows that compared to the multiplier with Radix?8 Booth algorithm,the speed of this multiplier is increased by 11% and its hardware resource is reduced by 3%. 经现场可编程逻辑器件仿真验证表明;与采用Radix-8 Booth算法的乘法器相比;该乘法器速度提高了11%25;硬件资源减少了3%25.
The inherent reprogrammability of Field Programmable Gate Arrays(FPGA)gives them some of the flexibility of software while keeping the performance advantages of Application Specific Integrated Circuit(ASIC). FPGA(Field Programmable Gate Arrays ,现场可编程逻辑门阵列)不仅保持了ASIC(Application Specific Integrated Circuit,专用集成电路)的特性,而且它固有的可重复编程性也给数字图像处理技术提供了软件设计上的灵活性。
The system is composed of Digital Signal Pro-cessor (DSP) and Field Programmable Gate Array (FPGA), one FPGA as coprocessor can implement different functions due to its re-configurable characteristic. 该系统采用DSP+FPGA的框架结构，利用FPGA的可重构特性将其中一片FPGA作为协处理器可以实现不同的图像处理功能。
Field programmable gate array (FPGA) has many advantages such as high reliability, high speed and so on.The FPGA design can be also transferred to ASIC circuit and the system cost reduces largely. 现场可编程逻辑阵列(FPGA)有可靠性高、速度快等优点，同时可以把FPGA设计生成ASIC电路，从而大大减少系统成本。
A method is presented for using field programmable gate array (FPGA) and numerical control oscillator (NCO) to approach a lower spurs and complex linear frequency modulation (LFM). 摘要针对采用脉冲压缩体制高性能超视距雷达的应用场合，提出了一种应用现场可编程逻辑阵列(FPGA)和数控振荡器(NCO)相结合实现低杂散复杂线性调频(LFM)方法。
We implement 2-D DCT function with Field Programable Gate Array (FPGA), and verify the design by the function simulation and timing simulation. 吾人使用FPGA实现非同步2D-DCT，并藉由功能模拟及时序模拟，来验证设计正确性。
In order to satisfy the flow measurement precision for big-pipe,multi-paths ultrasonic flow measurement system based FPGA(Field Programmable Gate Array) and phase lock loop(PLL) was developed. 为了满足大管径流量的测量精度,研制了基于现场可编程门阵列器件FPGA和锁相环路的多声路超声波流量测量系统。
Digital signal processor (DSP) and field programmable gate array (FPGA) were employed to implement the multi-joint control of the micromanipulator.Driver modules were also developed. 为达到高解析度、工作空间大、体积小的目的，本文提出一兼具传统串联及并联式机构优点之并联混合式机构。