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- A new method of designing synchronous sequential logic circuits is propsed. 提出了一种设计同步时序逻辑电路的新方法。
- Flip-flops are a key componemt and memory cells of sequential logic circuit. 触发器是构成时序逻辑电路的存储单元和核心部件。
- Sequential logic synthesis is an important part of RTL synthesis system design. 时序逻辑综合是RTL综合系统设计中的一个重要部分。
- The second is where you have to integrate the loop closely with the sequential logic. 第二点是，人们必须将一些控制环与顺序逻辑控制更紧密地集成。
- Complex programmable logic device (CPLD), usually used to develop ASIC, is widely used in digital system to accomplish complex combinational and sequential logic. 复杂的可编程逻辑器件(CPLD)广泛地用于数字系统中，常用作设计自己的专用集成电路，可实现复杂的组合逻辑和时序逻辑。
- By dividing RTL description into combinational logic and sequential logic, the method reuses the combinational logic synthesis and sequential logic synthesis in the controller synthesis, thus reducing the time used in developing RTL synthesis. 提出一种通过将RTL描述划分为时序逻辑与组合逻辑后 ;重用控制器综合中的组合逻辑综合和时序逻辑综合实现 RTL综合的方法 .;此方法有效地利用了已有的成熟技术;为缩短 RTL综合的开发时间提供了一种有效途径
- The Deka value T gate is a kind of multi functional and general logical unit. It has independent perfection function,and it can realize any combination logic and sequential logic. 十值T门是一种多功能通用逻辑部件;具有独立的功能完备性;它可以实现任何组合逻辑和时序逻辑.
- The Race and Hazard in the Sequential Logic Circuit 时序逻辑电路中的竞争冒险
- A Rapid Design Approach of Sequential Logic Net 一种时序逻辑网络的快速设计方法
- Designing synchronours sequential logic circuits 同步时序逻辑电路设计新法
- Computer aided logical design(CALD) software design rapidly and exactly combinational logical and sequential logical circuits. 该软件可以快速、准确、可靠地设计出多输入多输出液控逻辑回路，设计结果可以达到最优。
- synchronous sequential logic circuits 同步时序逻辑电路
- At this point your logic is at fault. 在这一点上你的推理是错误的。
- Design Method of Sequential Logic Circuits Using DT Flip- Flops 应用DT触发器的时序逻辑电路的设计方法
- Simple Method to Design Asynchronous Sequential Logic Circuit 异步时序逻辑电路设计的一种简明方法
- A New Method for Designing Asynchronous Sequential Logic Circuit 异步时序逻辑电路的设计方法探讨
- Loosely, a mathematical or logic operator. 不严格地说，一种数学或逻辑运算符。
- A New Method of Designing Synchronous Sequential Logic Circuits 一种设计同步时序逻辑电路的新方法
- A New Method to Design Synchronous Sequential Logic Circuit 同步时序逻辑电路设计的一种新方法
- A practitioner of a system of logic. 逻辑学家使用某一逻辑体系的人
