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- 伪轮廓Verilogfalse outline
- 伪轮廓false contouring
- 伪轮廓点dummy contour point
- 伪轮廓移去false contour remove
- 动态伪轮廓dynamic false contour
- 轮廓outline
- 伪轮廓除去false contour remove
- Verilog-AVerilog-A
- Verilog语义Verilog formal semantics
- Verilog-AMSVerilog-AMS
- 动态伪轮廓线dynamic false contour
- Verilog语言Verilog language
- Verilog-HDLVerilog-HDL
- 轮廓线contour line
- 证伪falsification
- Verilog-A模型Verilog-A model
- Verilog约束逻辑编程Verilog constraint logic programming
- 轮廓图skeleton map
- Verilog硬件描述语言Verilog HDL
- 伪词源(学)false etymology
