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- 高速浮点DSPfloating point DSP
- 下位机采用32位高速浮点DSP和16位6通道独立的高分辨率A/D转换器,完成数据的高速高精度采集、电能质量相关指标的计算以及与上位机的高速数据通信等功能。The lower computer is based on a 32bit high speed floating-point DSP and a 250kHz, 16-bit, 6-channel simultaneous sampling ADC to achieve the functions of high speed and high precision data acquisition, the arithmetics of the related indexes in power quality and the high speed data communication with the upper computer.
- 60路32kbit/s ADPCM ASIC中高速浮点乘法器的设计Design of a high speed floating point moltiplier in 60 channels 32kbps ADPCM ASIC
- 浮点DSPfloating-point DSP
- 32位浮点DSP综观Overview of 32-Bit Floating-point DSP
- 本课题的任务是为 LX-1164 处理器芯片开方浮点处理器(FPU)中的超高速浮点除法/开方运算器(FDIV)。The task is to develop a high-speed unit of floating-point division andsquare-root for FPU which build in LX1164 general CPU.
- 32位浮点DSP TMS320C30程序设计方法Programming of 32-bit Floating DSP TMS320C30
- 高性能浮点DSP芯片加法运算单元的研究与设计Research and Implementation of High Performance Add Unit for DSP
- 方法 采用 VXI总线 C尺寸双插槽宽模块及 I,Q支路双通道设计 ,通道采样率均为 5 0 0 MHz,系统存储深度为 2 MB,中央处理器采用高速浮点 DSPTMS3 2 0 C3 1 ,时序和逻辑电路由 CPL D实现 .Methods The VXI bus C size two slots module and I, Q channels were employed in the design and the sampling rate in each channel reached 500 MHz. The memory deep of the system was 2 MB and CPU was floating point DSP TMS320C31. The timing and logic function were fulfilled by CPLD.
- 基于浮点DSP的航姿系统自适应滤波算法与仿真研究Adaptive Filtering Algorithm and Simulation for Strapdown AHRS with Floating Point DSP
- 真正的程序员鄙视浮点运算。十进制是为蠢人而发明的。Real Programmers scorn floating point arithmetic. The decimal point was invented for pansy bedwetters who are unable to think big.
- 百万次浮点运算megaflop
- 变址浮点运算flip
- 浮点线程Floating Point ThreadFloating Point Thread
- 浮点解float solution
- 浮点FFTfloating FFT
- 浮点型floating point
- 命令行开关实际上是设置四个不同浮点杂注的简便方法。The command-line switches are in fact shorthand for setting the four different floating-point pragmas.
- 浮点单元floating point unit
- 浮点变换floating-point transform
